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 R2S15900SP
2ch Electronic Volume with Surround
REJ03F0126-0130 Rev.1.3 May 30, 2005
Description
The R2S15900SP is an optimum audio signal processor IC for TV. It has a 5ch input selector, surround/pseudo stereo, tone control(2band), output gain control and 2ch master volume. It can control all of these functions with I2C bus.
Features
Function Volume Input selector Rec output Tone control Surround/ Pseudo stereo Mode selector Output gain control MCU interface 0 to -84dB, -/ 1dB step Each channel is independence control. 5 input selector + MUTE 2 Rec output Bass: -15dB to +15dB/ 1dB step Treble: -15dB to +15dB/ 1dB step Surround Pseudo Stereo Bypass/ Tone / Tone & Pseudo Stereo or Surround 0dB/ +4.5dB I C-BUS control.
2
Features
Recommended Operating Condition
Supply voltage: VCC = 9.0V(typ)
Application
TV, Mini Stereo, etc.
System Configuration
REC L1 REC L2 (IN L4) (IN L5) VCC=9V
Volume L
Mode Selector
IN L1 IN L2 IN L3
Tone Control (Bass / Treble)
LOUT
Pseudo Stereo and Surround Output Gain Control Mode Selector
IN R1 IN R2 IN R3
Volume R
ROUT
Output Gain Control
I 2 C -BUS I/F
REC R1 REC R2 (IN R4) (IN R5) SCL SDA
Rev.1.3 May 30, 2005 page 1 of 8
R2S15900SP
Block Diagram and Pin Configuration
REFIN INL1 INL2 INL3
1 2 3
-
+
REF
28
Input Selector
VCC INR1 INR2 INR3 RECR1 (INR4) RECR2 (INR5) TRER BASSR1 BASSR2 ROUT
Input Selector
27 26
-2dB
-2dB
4
Lch Volume 0 to -84dB, Rch Volume 0 to -84dB,
25 24 23 22
Tone Control Bass/ Treble Tone Control Bass/ Treble
RECL1 5 (INL4) RECL2 6 (INL5) TREL 7
BASSL1 8 BASSL2 9 PSEUDO 10
21 20
Pseudo Stereo and Surround
Mode Selector Output Gain Control
19 18 17 16
LOUT 11 GND 12 NC 13
Output Gain Control
-
Mode Selector
+
+
SCL SDA
-
I C-BUS I/F
2
Rext Cext
De - pop
NC 14
(Top view)
15
Rev.1.3 May 30, 2005 page 2 of 8
R2S15900SP
Application Example
VCC=9V
1F
+
1 2
-
+
REF
28 +
1F
Input Selector
1F
+
Input Selector
INL1
1F
27 +
1F
INR1
+ +
INL2
1F
3
-2dB -2dB
26 +
1F
INR2
INL3
4.7F
4 + + 5 6 7
Tone Control Bass/ Treble Tone Control Bass/ Treble
Lch Volume 0 to -84dB, Rch Volume 0 to -84dB,
25 24 23
8200 pF
INR3
RECL1 (INL4) RECL2 (INL5)
+ +
1F
RECR1 (INR4) RECR2 (INR5)
4.7F
1F
8200 pF
22
0.068F
0.068F
8.2k
8 9 10
21 20
Pseudo Stereo and Surround
8.2k
0.068F
0.068F 4.7F
0.015F
Mode Selector Output Gain Control
19 18 17 16
330 47k
SCL
*
+
ROUT
4.7F
LOUT
47k
330
-
+
Mode Selector
*
11 12
Output Gain Control
+
-
+
SDA I C-BUS I/F
2
MCU
NC
13
De -pop
10k
NC
14
15
0.22 F
Note:
*If the load C value is over 180pF, please attach 330 for series R (Load C value is under 180pF, series R is no need. ) Load C value is usually input capacitor of speaker.
Rev.1.3 May 30, 2005 page 3 of 8
R2S15900SP
Absolute Maximum Ratings
Parameter Power supply Power dissipation Thermal derating Operating temperature Storage temperature Symbol VCC Pd K Topr Tstg -20 to +75 -40 to +125 Ratings 10 Unit V W mW/C C C Ta25C Ta>25C (Circuit board installation) Condition
Rev.1.3 May 30, 2005 page 4 of 8
R2S15900SP
Electrical Characteristics
(VCC=9V, Ta=25C, Vi=100mVrms, f=1kHz, Tone control=0dB, Rg=0, RL=47k, unless otherwise noted) General Characteristics
Parameter Operational power supply Supply current Reference voltage Input impedance Maximum input voltage Maximum output voltage Rec output gain Output gain Volume maximum Volume minimum Channel balance Total harmonic distortion Input selector cross talk Channel separation Output noise 1 Output noise 2 Symbol VCC ICC Vref RIN VIM VOM Gvrec Gvout VOLmax VOLmin CBAL THD CT CS Vno1 Vno2 Min 5.0 -- 4.0 17 2.8 -- -- -- -2 -- -1.5 -- -- -- -- -- Limits Typ 9.0 15 4.5 25 3.0 2.5 -2.0 4.5 0 -85 0 -- -- -- -90 (31.6) -103 (7) Max 9.7 25 5.0 33 -- -- -- -- +2 -70 1.5 0.5 -70 -70 -85 (56.2) -97 (14) Unit V mA V k Vrms Vrms dB dB dB dB dB % dB dB dBV (Vrms) dBV (Vrms) No signal No signal VOL=-20dB, THD=3% VOL=0dB, THD=1% Rec out Output gain=4.5dB VOL=0dB VOL=Mute, Vi=1Vrms, IHF-A VOL=0dB 400Hz to 30kHz BPF Vo=0.5Vrms Vi=1Vrms, IHF-A Vi=1Vrms, IHF-A, VOL=0dB,Output gain=0dB Tone=0dB,Surround ON, IHF-A VOL=Mute, Output gain=0dB Bypass, IHF-A Condition
Tone Control
Limits Parameter Tone control voltage gain (Boost/Bass) Tone control voltage gain (Cut/Bass) Tone control voltage gain (Flat/Bass) Tone control voltage gain (Boost/Treble) Tone control voltage gain (Cut/Treble) Tone control voltage gain (Flat/Treble) Symbol G (Bass) B G (Bass) C G (Bass) F G (Treble) B G (Treble) C G (Treble) F Min +12.5 -17.5 -2 +12.5 -17.5 -2 Typ +15 -15 0 +15 -15 0 Max +17.5 -12.5 +2 +17.5 -12.5 +2 Unit dB dB dB dB dB dB Condition f = 100Hz Bass= + 15dB f = 100Hz Bass = -15dB f = 100Hz Bass = 0dB f = 10kHz Tre = +15dB f = 10kHz Tre = -15dB f = 100Hz Tre = 0dB
I C BUS Interface
Limits Parameter Low level input voltage High level input voltage Maximum clock frequency Symbol VIL VIH fSCL Min 0 3 Typ -- -- Max 1.5 5 100 Unit V V kHz VCC=9V VCC=9V Condition
2
Rev.1.3 May 30, 2005 page 5 of 8
R2S15900SP
Function Description
1. Tone Control Circuit
<1> Bass Circuit
IN
Boost
R3
+ R2
OUT
fo =
1 2 R1(R2+R3 C1C2 1 C1+C2 C1C2R2 R1 R2+R3 +2 R1 R3 +2 R1
( Hz)
Q~ =
(R3=0)
C1 R1
C2
Gv = 20 log
(dB)
(C1=C2)
Cut
IN
+ -
OUT R2 R3
fo =
2
1 R1(R2+R3 C1C2 C1C2R2 R1 R3 +2 R1 R2+R3 +2 R1
(Hz)
Q~ =
1 C1+C2
(R3=0) (C1=C2) (dB)
C1 R1
C2
Gv = 20 log
<2> Treble Circuit
IN
Boost
+ R1 R2
OUT
Gv = 20 log C
R1+R2 R1
(dB)
IN
Cut
+ -
OUT R2 R1
Gv = 20 log C
R1 R1+R2
(dB)
Rev.1.3 May 30, 2005 page 6 of 8
R2S15900SP
I2C Bus Format
MSB LSB MSB LSB MSB LSB
S 1 bit
Slave Address 8bit
A 1 bit
Sub Address 8bit
A 1 bit
Data 8bit
A 1 bit
P 1bit
S: Starting Term A: Acknowledge Bit P: Stop Term If more than one Data Byte is transmitted, then the significant SUB ADDRESS bits are auto incremented. 00H 01H 02H 03H 04H 00H
1. Slave Address
MSB LSB
1
0
0
0
0
0
1
R/W B
R/W B = 0: Write mode for register setting R/W B = 1: Not available
2. Sub Address Table
Sub Address 00H 01H 02H 03H 04H Default values are all "0". BIT D7 D6 D5 Lch VOL Rch VOL Input selector Bass Treble Rec output D4 D3 D2 D1 Lch VOL Rch VOL Output Lch mute gain Surround level 0 D0
Rch mute
Mode selector 0 0
3. Data Table <1> Master Volume Control (Sub Address: 00H, 01H)
VOL ATT (dB) 0 -10 -20 -30 -40 -50 -60 -70 -80 VOL D7 0 0 0 0 0 0 0 0 1 D6 0 0 0 0 1 1 1 1 0 D5 0 0 1 1 0 0 1 1 0 D4 0 1 0 1 0 1 0 1 0 VOL ATT (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 VOL D3 0 0 0 0 0 0 0 0 1 1 D2 0 0 0 0 1 1 1 1 0 0 D1 0 0 1 1 0 0 1 1 0 0 D0 0 1 0 1 0 1 0 1 0 1
Example: If the volume of the Lch is set to -28dB, the Data byte is transmitted as follows:
Sub Address 00H BIT D7 0 D6 0 D5 1 D4 0 D3 1 D2 0 D1 0 D0 0
Rev.1.3 May 30, 2005 page 7 of 8
R2S15900SP <2> Input Selector (Sub Address: 02H)
Input All OFF IN1 IN2 IN3 IN4 Input selector D7 0 0 0 0 1 D6 0 0 1 1 0 D5 0 1 0 1 0 REC1 D4 A A A A 1 A REC2 D3 A A A A A 1
IN5 1 0 1 If A=0 means REC1 or REC2 output ON, then A=1 means REC1 or REC2 output OFF.
<3> Output Gain (Sub Address: 02H)
Gain 0dB +4.5dB Output gain D2 0 1
<5> Surround Mode (Sub Address: 03H)
Surround level Low level High level Surround level D2 0 1
<4> Mute Function (Sub Address: 02H)
Mute Mute ON Mute OFF Lch D1 0 1 Rch D0 0 1
<6> Mode Selector (Sub Address: 03H)
Mode Bypass Tone Tone & Pseudo stereo Tone & Surround Mode selector D1 D0 0 0 1 1 0 1 0 1
<7> Tone Control (Sub Address: 03H Bass, 04H Treble)
Gain (dB) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 D7 D6 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Bass/ Treble D5 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D4 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D3 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
A
If A=0 means Tone control gain CUT(-), then A=1 means Tone control gain BOOST(+).
Rev.1.3 May 30, 2005 page 8 of 8
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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